Serializer/deserializers for use in optoelectronic devices

An optoelectronic device implements a serializer array circuit or multi-channel CDR circuit to reduce the cost and size of the circuit. An efficient serializer array circuit includes a plurality of serializer blocks sharing the functionality of a single CMU to clock a plurality of serial signals out of the final stages of the serializer blocks. An efficient multi-channel CDR circuit includes a single CDR for acquiring the clock for one of a plurality of data signals and a plurality of DLLs using the recovered clock to acquire the data for the plurality of data signals. Alternately, an efficient multi-channel CDR circuit includes a single frequency acquisition loop and a plurality of data acquisition loops.