Metallurgy for copper plated wafers

Improved protective metallization is described for bumped copper-top semiconductor chips. The semiconductor device includes a top wafer fabrication passivation layer with openings through which contact pads are exposed. A patterned copper layer is formed over the passivation layer and is electrically coupled to the contact pads through the openings. A metallic barrier layer is provided between the contact pads and the patterned copper layer. A titanium metallization layer overlies the patterned copper layer and cooperates with the barrier layer to envelop the copper layer in the regions of the contact pads. An aluminum metallization layer overlies the titanium metallization layer. An electrically insulating protective layer overlies the aluminum metallization and passivation layers. The protective layer includes openings in which underbump metallization stacks are formed. Each underbump metallization stack electrically connects to the aluminum metallization layer through an opening in the protective layer. Solder bumps adhere to the underbump metallization stacks.