Semiconductor package with reduced length interconnect and manufacturing method thereof

A semiconductor apparatus includes a semiconductor chip, a wired board, a plurality of bump electrodes, a plurality of external terminals, and insulating material. The semiconductor chip includes a plurality of electrode pads arranged in a central area on one surface. The wired board is arranged as...

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Bibliographische Detailangaben
Hauptverfasser: ANJO ICHIRO, WATANABE MITSUHISA
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A semiconductor apparatus includes a semiconductor chip, a wired board, a plurality of bump electrodes, a plurality of external terminals, and insulating material. The semiconductor chip includes a plurality of electrode pads arranged in a central area on one surface. The wired board is arranged as facing one surface of the semiconductor chip, and includes a wiring. The bump electrode is provided between surfaces at which the semiconductor chip and the wired board face each other, and electrically connects the electrode pad and the wiring. The external terminal corresponds to a plurality of bump electrodes, and is mounted on the wired board. The insulating material is provided between the semiconductor chip and the wired board, and covers at least a connection part between the bump electrode and the wiring. The wiring of the wired board is configured to run in a straight line from a bump electrode-mounted position in a semiconductor chip-mounted surface of the wired board, to an external terminal-mounted surface of the wired board, and also, electrically connect the bump electrode and the corresponding external terminal.