System and method to reduce noise in a substrate

Certain embodiments of the invention may be found in, for example, a system that reduces noise in a substrate of a chip and may comprise a substrate layer that is integrated within the chip. A transistor layer is integrated within the chip and is shielded from the substrate layer by a shielding layer. At least one transistor of a first transistor type couples the transistor layer to the shielding layer and a quiet voltage source may be coupled to the transistor of the first transistor type. At least one transistor of a second transistor type is coupled to the shielding layer. The transistor of the second transistor type may be a n-type transistor, which may be disposed within the transistor layer and the transistor of the second transistor type may be resistively coupled to the shielding layer.