Integrated SiGe NMOS and PMOS transistors

Integrated SiGe NMOS and PMOS transistors

A method of fabricating an integrated BiCMOS circuit is provided, the circuit including bipolar transistors 10 and CMOS transistors 12 on a substrate. The method comprises the step of forming an epitaxial layer 28 to form a channel region of a MOS transistor and a base region of a bipolar transistor...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: JUMPERTZ REINER, SCHIMPF KLAUS
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:A method of fabricating an integrated BiCMOS circuit is provided, the circuit including bipolar transistors 10 and CMOS transistors 12 on a substrate. The method comprises the step of forming an epitaxial layer 28 to form a channel region of a MOS transistor and a base region of a bipolar transistor. Growing of the epitaxial layer includes growing a first sublayer of silicon 28a, a first sublayer of silicon-germanium 28b onto the first sublayer of silicon, a second sublayer of silicon 28c onto the first sublayer of silicon-germanium, and a second sublayer of silicon-germanium 28d onto the second sublayer of silicon. Furthermore, an integrated BiCMOS circuit is provided, which includes an epitaxial layer 28 as described above.