FIN-FET device structure

FIN-FET device structure

A method for forming a FIN-FET device employs a blanket planarizing layer formed upon a blanket topographic gate electrode material layer. The blanket planarizing layer is patterned and employed as a mask layer for patterning the blanket topographic gate electrode material layer to form a gate elect...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: THEI KONG-BENG, CHENG CHUNG-LONG
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:A method for forming a FIN-FET device employs a blanket planarizing layer formed upon a blanket topographic gate electrode material layer. The blanket planarizing layer is patterned and employed as a mask layer for patterning the blanket topographic gate electrode material layer to form a gate electrode. Since the blanket planarizing layer is formed as a planarizing layer, a photoresist layer formed thereupon is formed with enhanced resolution. As a result, the gate electrode is also formed with enhanced resolution. A resulting FIN-FET structure has the patterned planarizing layer formed in an inverted "U" shape upon the gate electrode.