Logarithmic linear variable gain CMOS amplifier

A logarithmic linear variable gain CMOS amplifier includes first and second differential pairs of transistors forming a differential input, with each differential pair of transistors including a common source node. A pair of diode-connected load transistors is connected to the first and second diffe...

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Bibliographische Detailangaben
Hauptverfasser: BOLLATI GIACOMINO, BONGIORNI MARCO, GAETA MARCO
Format: Patent
Sprache:eng
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Zusammenfassung:A logarithmic linear variable gain CMOS amplifier includes first and second differential pairs of transistors forming a differential input, with each differential pair of transistors including a common source node. A pair of diode-connected load transistors is connected to the first and second differential pairs of transistors, and a third differential pair of transistors is connected to the pair of diode-connected load transistors. The third differential pair of transistors includes respective gates connected together and in parallel to gates of the first and second differential pairs of transistors. First and second current mirrors are respectively connected to the common source nodes of the first and second differential pairs of transistors for programmably injecting respective bias currents thereto, with a sum of the respective bias currents remaining constant.