Test circuit for semiconductor memory device

A semiconductor memory device is capable of performing a normal operation, while detecting an internal voltage without a special bonding method during a test mode. The semiconductor memory device comprises a switching unit and an internal reference voltage generating unit. The switching unit transfers one of an internal and an external reference voltages according to whether a test mode is being performed, wherein the external reference voltage is input from outside of the semiconductor memory device. The internal reference voltage generating unit generates the internal reference voltage having the same level of the external reference voltage to thereby supply the internal reference inside the semiconductor memory device during the test mode.