Method and apparatus for testing a controlled impedance buffer

A method and apparatus is provided to utilize the configurability of a programmable logic device (PLD), so as to reduce the complexity of special test equipment (STE) fixtures that are required to test the PLD. The output drivers of certain I/O buffers of the PLD that are not under test may be confi...

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Bibliographische Detailangaben
Hauptverfasser:	RAU PRASAD, SIMMONS TUYET NGOC, PATRA MADAN
Format:	Patent
Sprache:	eng
Schlagworte:	MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS TESTING
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Beschreibung
Zusammenfassung:	A method and apparatus is provided to utilize the configurability of a programmable logic device (PLD), so as to reduce the complexity of special test equipment (STE) fixtures that are required to test the PLD. The output drivers of certain I/O buffers of the PLD that are not under test may be configured to exhibit a particular impedance magnitude. The impedance magnitude of the output drivers that are not under test may then be used to supply the reference impedance that is required by the digitally controlled impedance (DCI) controllers of the I/O buffers that are under test. The DCI controllers may then correctly configure the impedance magnitude of the respective I/O buffers under test, so as to test the functionality of the controlled impedance buffers for I/O standards that require controlled impedance.