Method and apparatus for eliminating noise induced errors during test of a programmable logic device

A method and apparatus for substantially eliminating noise induced errors caused by a premature start-up sequence between configuration of an integrated circuit (IC) and execution of functional test vectors. A noise elimination sequence is executed, whereby the configuration bitstream associated wit...

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Bibliographische Detailangaben
Hauptverfasser:	MANSOUR TEYMOUR M, SIMMONS RANDY J
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING HANDLING RECORD CARRIERS INFORMATION STORAGE INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORDCARRIER AND TRANSDUCER MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS PRESENTATION OF DATA RECOGNITION OF DATA RECORD CARRIERS TESTING
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Beschreibung
Zusammenfassung:	A method and apparatus for substantially eliminating noise induced errors caused by a premature start-up sequence between configuration of an integrated circuit (IC) and execution of functional test vectors. A noise elimination sequence is executed, whereby the configuration bitstream associated with the IC is scanned for the existence of a start-up sequence. If found, the start-up sequence is stripped from the configuration bitstream and the IC is then configured using the modified configuration bitstream. The input/output (I/O) pins of the IC remain in a deactivated state until a startup sequence is transmitted to the IC via a Joint Test Action Group (JTAG) port of the IC, which then allows IC testing to commence.