Semiconductor storage apparatus

A semiconductor storage apparatus comprising: a ferroelectric memory; an SRAM 30; a counter 41; a CAM 10 that judges whether or not a block of data requested to be read out from the ferroelectric memory is stored in the SRAM 30; a storage control unit 51 that, if a result of the judgment is negative, performs a control to read out the requested block of data from the ferroelectric memory and stores a copy of the read-out block of data into a unit storage area in the SRAM 30 that corresponds to the count value indicated by the counter 41; and a counter control unit 52 that causes the counter 41 to update the count value each time a result of the judgment is negative.