Structure for logical "OR" using ballistics transistor technology
A ballistic logic gate is disclosed. The ballistic logic gate may include an etched silicon substrate with a pair of etched silicon triangular baffles defining input channels. An electron may travel through the input channels toward a nano-deflector with a parabolic deflection surface. The parabolic...
Gespeichert in:
Hauptverfasser: | , , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | A ballistic logic gate is disclosed. The ballistic logic gate may include an etched silicon substrate with a pair of etched silicon triangular baffles defining input channels. An electron may travel through the input channels toward a nano-deflector with a parabolic deflection surface. The parabolic deflection surface may guide electrons into a fixed path of an output channel toward an output terminal for performing a logic function. |
---|