Apparatus and method for generating packed sum of absolute differences

A microprocessor for generating a packed sum of absolute differences is disclosed. The microprocessor includes an instruction translator, for translating a Multimedia Extensions (MMX) Packed Sum of Absolute Differences Byte to Word (PSADBW) macroinstruction into at least first and second microinstru...

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Bibliographische Detailangaben
Hauptverfasser: JOHNSON DANIEL W. J, LOPER, JR. ALBERT J
Format: Patent
Sprache:eng
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Zusammenfassung:A microprocessor for generating a packed sum of absolute differences is disclosed. The microprocessor includes an instruction translator, for translating a Multimedia Extensions (MMX) Packed Sum of Absolute Differences Byte to Word (PSADBW) macroinstruction into at least first and second microinstructions. The microprocessor includes an MMX unit, coupled to the instruction translator, for generating a result of the PSADBW macroinstruction in response to the at least first and second microinstructions.