Method for fabricating an integrated circuit comprising a three-dimensional capacitor

A capacitor fabricated, within an integrated circuit, has at least two capacitive trenches extending within a dielectric material. A metal layer is produced which is embedded in the dielectric material. To form the capacitor, the dielectric material is etched, with etching stopped at the metal layer...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: GIRAUDIN JEANRISTOPHE, DELPECH PHILIPPE, CREMER SEBASTIEN
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A capacitor fabricated, within an integrated circuit, has at least two capacitive trenches extending within a dielectric material. A metal layer is produced which is embedded in the dielectric material. To form the capacitor, the dielectric material is etched, with etching stopped at the metal layer so as to form the trenches. A layer of conductive material forming the lower electrode of the capacitor is then deposited at least on the sidewalls of the trenches and in contact with the metal layer. A dielectric layer is then deposited within the trenches. A layer of conductive material forming the upper electrode of the capacitor is then deposited within the trenches.