Intelligent watchdog circuit
A simple, but intelligent watchdog circuit uses an up/down counter for its delay element. A watchdog event will occur if the counter is allowed to over flow or under flow its boundaries (in either direction). The system objective is to keep the counter within its boundaries by controlling the direct...
Gespeichert in:
Hauptverfasser: | , , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | A simple, but intelligent watchdog circuit uses an up/down counter for its delay element. A watchdog event will occur if the counter is allowed to over flow or under flow its boundaries (in either direction). The system objective is to keep the counter within its boundaries by controlling the direction of the count. The count direction is simply a function of the Most Significant Bit (MSB) of the counter. Thus, the system must simply monitor the counters MSB and perform a little intelligent to determine the desired count direction. |
---|