Plasma display panel and driving method thereof
Disclosed is a PDP driving method having a misfiring erase period between reset and address periods. Large amounts of positive and negative charges are respectively formed on scan and sustain electrodes because of an unstable reset operation in the reset period. Because of the charges, discharging c...
Gespeichert in:
| Hauptverfasser: | , , , , |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | SON JIN-BOO JIN KWANG-HO NAM JIN-WON LIM JEA-HYUK KIM JIN-SUNG |
| description | Disclosed is a PDP driving method having a misfiring erase period between reset and address periods. Large amounts of positive and negative charges are respectively formed on scan and sustain electrodes because of an unstable reset operation in the reset period. Because of the charges, discharging can occur between the scan and sustain electrodes in the sustain period even without addressing in the address period. In the misfiring erase period, a voltage is applied between the scan and sustain electrodes to generate discharging and respectively form negative and positive charges on the scan and sustain electrodes. An erase pulse is then applied to erase the negative and positive charges respectively formed on the scan and sustain electrodes. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US7468712B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US7468712B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US7468712B23</originalsourceid><addsrcrecordid>eNrjZNAPyEkszk1USMksLshJrFQoSMxLzVFIzEtRSCnKLMvMS1fITS3JyE9RKMlILUrNT-NhYE1LzClO5YXS3AwKbq4hzh66qQX58anFBYnJqXmpJfGhweYmZhbmhkZORsZEKAEA02wqpg</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Plasma display panel and driving method thereof</title><source>esp@cenet</source><creator>SON JIN-BOO ; JIN KWANG-HO ; NAM JIN-WON ; LIM JEA-HYUK ; KIM JIN-SUNG</creator><creatorcontrib>SON JIN-BOO ; JIN KWANG-HO ; NAM JIN-WON ; LIM JEA-HYUK ; KIM JIN-SUNG</creatorcontrib><description>Disclosed is a PDP driving method having a misfiring erase period between reset and address periods. Large amounts of positive and negative charges are respectively formed on scan and sustain electrodes because of an unstable reset operation in the reset period. Because of the charges, discharging can occur between the scan and sustain electrodes in the sustain period even without addressing in the address period. In the misfiring erase period, a voltage is applied between the scan and sustain electrodes to generate discharging and respectively form negative and positive charges on the scan and sustain electrodes. An erase pulse is then applied to erase the negative and positive charges respectively formed on the scan and sustain electrodes.</description><language>eng</language><subject>ADVERTISING ; ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION ; CRYPTOGRAPHY ; DISPLAY ; EDUCATION ; PHYSICS ; SEALS</subject><creationdate>2008</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20081223&DB=EPODOC&CC=US&NR=7468712B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20081223&DB=EPODOC&CC=US&NR=7468712B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>SON JIN-BOO</creatorcontrib><creatorcontrib>JIN KWANG-HO</creatorcontrib><creatorcontrib>NAM JIN-WON</creatorcontrib><creatorcontrib>LIM JEA-HYUK</creatorcontrib><creatorcontrib>KIM JIN-SUNG</creatorcontrib><title>Plasma display panel and driving method thereof</title><description>Disclosed is a PDP driving method having a misfiring erase period between reset and address periods. Large amounts of positive and negative charges are respectively formed on scan and sustain electrodes because of an unstable reset operation in the reset period. Because of the charges, discharging can occur between the scan and sustain electrodes in the sustain period even without addressing in the address period. In the misfiring erase period, a voltage is applied between the scan and sustain electrodes to generate discharging and respectively form negative and positive charges on the scan and sustain electrodes. An erase pulse is then applied to erase the negative and positive charges respectively formed on the scan and sustain electrodes.</description><subject>ADVERTISING</subject><subject>ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION</subject><subject>CRYPTOGRAPHY</subject><subject>DISPLAY</subject><subject>EDUCATION</subject><subject>PHYSICS</subject><subject>SEALS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2008</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNAPyEkszk1USMksLshJrFQoSMxLzVFIzEtRSCnKLMvMS1fITS3JyE9RKMlILUrNT-NhYE1LzClO5YXS3AwKbq4hzh66qQX58anFBYnJqXmpJfGhweYmZhbmhkZORsZEKAEA02wqpg</recordid><startdate>20081223</startdate><enddate>20081223</enddate><creator>SON JIN-BOO</creator><creator>JIN KWANG-HO</creator><creator>NAM JIN-WON</creator><creator>LIM JEA-HYUK</creator><creator>KIM JIN-SUNG</creator><scope>EVB</scope></search><sort><creationdate>20081223</creationdate><title>Plasma display panel and driving method thereof</title><author>SON JIN-BOO ; JIN KWANG-HO ; NAM JIN-WON ; LIM JEA-HYUK ; KIM JIN-SUNG</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US7468712B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2008</creationdate><topic>ADVERTISING</topic><topic>ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION</topic><topic>CRYPTOGRAPHY</topic><topic>DISPLAY</topic><topic>EDUCATION</topic><topic>PHYSICS</topic><topic>SEALS</topic><toplevel>online_resources</toplevel><creatorcontrib>SON JIN-BOO</creatorcontrib><creatorcontrib>JIN KWANG-HO</creatorcontrib><creatorcontrib>NAM JIN-WON</creatorcontrib><creatorcontrib>LIM JEA-HYUK</creatorcontrib><creatorcontrib>KIM JIN-SUNG</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SON JIN-BOO</au><au>JIN KWANG-HO</au><au>NAM JIN-WON</au><au>LIM JEA-HYUK</au><au>KIM JIN-SUNG</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Plasma display panel and driving method thereof</title><date>2008-12-23</date><risdate>2008</risdate><abstract>Disclosed is a PDP driving method having a misfiring erase period between reset and address periods. Large amounts of positive and negative charges are respectively formed on scan and sustain electrodes because of an unstable reset operation in the reset period. Because of the charges, discharging can occur between the scan and sustain electrodes in the sustain period even without addressing in the address period. In the misfiring erase period, a voltage is applied between the scan and sustain electrodes to generate discharging and respectively form negative and positive charges on the scan and sustain electrodes. An erase pulse is then applied to erase the negative and positive charges respectively formed on the scan and sustain electrodes.</abstract><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng |
| recordid | cdi_epo_espacenet_US7468712B2 |
| source | esp@cenet |
| subjects | ADVERTISING ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION CRYPTOGRAPHY DISPLAY EDUCATION PHYSICS SEALS |
| title | Plasma display panel and driving method thereof |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-06T17%3A06%3A22IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=SON%20JIN-BOO&rft.date=2008-12-23&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS7468712B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |