Plasma display panel and driving method thereof

Disclosed is a PDP driving method having a misfiring erase period between reset and address periods. Large amounts of positive and negative charges are respectively formed on scan and sustain electrodes because of an unstable reset operation in the reset period. Because of the charges, discharging c...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: SON JIN-BOO, JIN KWANG-HO, NAM JIN-WON, LIM JEA-HYUK, KIM JIN-SUNG
Format: Patent
Sprache:eng
Schlagworte:
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Beschreibung
Zusammenfassung:Disclosed is a PDP driving method having a misfiring erase period between reset and address periods. Large amounts of positive and negative charges are respectively formed on scan and sustain electrodes because of an unstable reset operation in the reset period. Because of the charges, discharging can occur between the scan and sustain electrodes in the sustain period even without addressing in the address period. In the misfiring erase period, a voltage is applied between the scan and sustain electrodes to generate discharging and respectively form negative and positive charges on the scan and sustain electrodes. An erase pulse is then applied to erase the negative and positive charges respectively formed on the scan and sustain electrodes.