Reducing latency in a channel adapter by accelerated I/O control block processing

The present invention generally relates to digital network communication, and in particular to processing data according to the InfiniBand(TM) (IB) Protocol with reduced latency and chip costs in an InfiniBand(TM) type computer system. ID information in a packet header is obtained before the body of...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser:	LIPPONER WALTER, ULLAND HARMUT, HELMS MARKUS, SENTLER DANIEL, DORSCH RAINER, ECKERT MARTIN, SCHLIPF THOMAS
Format:	Patent
Sprache:	eng
Schlagworte:	ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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Beschreibung
Zusammenfassung:	The present invention generally relates to digital network communication, and in particular to processing data according to the InfiniBand(TM) (IB) Protocol with reduced latency and chip costs in an InfiniBand(TM) type computer system. ID information in a packet header is obtained before the body of the packet has completely arrived at a receiving Channel adapter. The ID information is used to obtain work Queue Pair Context (QPC) and when needed an associated Work Queue Element (WQE), for operating on the data content of the packet being received.