Integrated circuit including a multiplexer circuit

An integrated circuit including a multiplexer circuit and numerous memory cells are coupled to one another for improved performance. The multiplexer circuit includes a first input terminal and a second input terminal respectively coupled to an output of a first memory and an output of a second memory cell of the numerous memory cells. The multiplexer may also include select terminals coupled to a control signal and a complement of the control signal. An output of the multiplexer circuit is selectively coupled to one of four possible signals, where two of the four signals are the control signal and the complement of the control signal.