Method and apparatus to improve multi-CPU system performance for accesses to memory

Methods and apparatuses for improving processor performance in a multi-processor system by optimizing accesses to memory. Processors can track the state of a memory such that the memory can be efficiently utilized in a multi-processor system including the ability to decode incoming snoop addresses from other processors, comparing them to contents of a memory tracking register(s), and updating tracking register(s) appropriately. Likewise, the transactions from other non-processor bus agents and/or bus mastering devices, such as a bus bridge, memory controller, Input/output (I/O), and graphics could also be tracked.