Carry look-ahead circuit and adder using same

A carry look-ahead circuit for an adder to decrease circuit size and power consumption. The carry look-ahead circuit is composed of 2-input NAND gates 101, 102 , 2-input NOR gate 103 , AND-NOR type composite gates 201, 202 , OR-NAND type composite gate 251 , or other gates with 2 or less series stages of transistors inserted between the output terminal and the power source line or the ground line. When the number of series stages of transistors increases, the driving power decreases. Consequently, in order to maintain the same operation speed, it is necessary to increase the transistor size. The use of multi-input NAND gates and NOR gates, makes it possible to suppress the number of series stages of transistors and to reduce the transistor size. As a result, it is possible to decrease the circuit size and power consumption.