Nonvolatile memory

There is provided a non-volatile memory capable of being supplied with two varieties of externally supplied voltages, stabilizing the operation thereof, at a voltage in the vicinity of a threshold voltage for switching over between the externally supplied voltages, and stabilizing the operation thereof, at the times of writing and erasing, respectively. The non-volatile memory comprises a power supply circuit incorporating a hysteresis comparator having two voltage levels for the threshold voltage, wherein by detection of 2.3V at a time when an externally supplied voltage rises, a detection signal goes to an "H" level, whereupon an internal step-down circuit, made up of a constant voltage circuit, and so forth, comes into action, generating an internal operation voltage at 2.2V to be subsequently supplied, and thereafter, by detection of 2.1V, the detection signal goes to an "L" level, whereupon the externally supplied voltage, as it is, is supplied as the internal operation voltage. Accordingly, since the detection signal remains in the "H" condition even when the externally supplied voltage is unstable in the vicinity of 2.3V, the internal operation voltage does not undergo variation.