Memory array with global bitline domino read/write scheme

Memory array with global bitline domino read/write scheme

A circuit for implementing memory arrays using a global bitline domino read/write scheme. The memory circuit includes a plurality of cells each configured to store a bit of data. The memory circuit further includes a plurality of local bitlines, wherein each cells is coupled to one of the local bitl...

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Bibliographische Detailangaben
Hauptverfasser: ANDRADE VICTOR F, POSEY RANDAL L, CIRAULA MICHAEL K, NOVAK AMY M, SCHAEFER ALEXANDER W, HUBER JAN MICHAEL, BRAGANZA MICHAEL C, MOENCH JERRY D, DANKERT FLOYD L, CHRUDIMSKY SOOLIN KAO
Format: Patent
Sprache:eng
Schlagworte:
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Zusammenfassung:A circuit for implementing memory arrays using a global bitline domino read/write scheme. The memory circuit includes a plurality of cells each configured to store a bit of data. The memory circuit further includes a plurality of local bitlines, wherein each cells is coupled to one of the local bitlines. Each of the plurality of local bitlines is a differential bitline having a signal path and a complementary signal path which are cross-coupled by a pair of transistors.