Lead frame-based semiconductor device packages incorporating at least one land grid array package

A lead frame-based semiconductor device package including at least one land grid array package. At least one semiconductor die is mounted to an interposer substrate, with bond pads of the semiconductor die connected to terminal pads on the same side of the interposer substrate as the at least one semiconductor die. The terminal pads of the interposer substrate may be electrically connected to both a peripheral array pattern of lands and to a central, two-dimensional array pattern of pads, both array patterns located on the opposing side of the interposer substrate from the at least one semiconductor die. The assembly is overmolded with an encapsulant, leaving the opposing side of the interposer substrate free of encapsulant. Lead fingers of a lead frame superimposed on the opposing side of the interposer substrate are bonded directly to the land grid array lands. Two land grid array packages as previously described may be superimposed on opposing sides of lead fingers of a lead frame disposed therebetween and electrically connected thereto. Methods of fabrication are also disclosed.