Low inductance high ESR capacitor

A low inductance multi-layer capacitor. The capacitor comprises interleaved parallel internal electrode plates with dielectric there between. Each internal electrode plate comprises two lead-out tabs and is generally T shaped. A first external electrode terminal is electrically connected to the lead...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: RENNER GARRY, TAJUDDIN AZIZUDDIN, RANDALL MICHAEL S, BLAIS PETER, HILL ALLEN, VAUGHAN RANDAL
Format: Patent
Sprache:eng
Schlagworte:
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Beschreibung
Zusammenfassung:A low inductance multi-layer capacitor. The capacitor comprises interleaved parallel internal electrode plates with dielectric there between. Each internal electrode plate comprises two lead-out tabs and is generally T shaped. A first external electrode terminal is electrically connected to the lead-out tabs of the even internal electrode plates, and a second external electrode terminal is electrically connected to the lead-out tabs of the odd internal electrode plates. The external electrode terminals are on a common first exterior surface and a common opposing second exterior surface of the capacitor.