Method of forming metal wiring of semiconductor device

A method for forming a metal wiring of a semiconductor device. The method includes forming an etch stop layer on a semiconductor substrate, forming a first inter metal dielectric on the etch stop layer, and forming a second inter metal dielectric on the first inter metal dielectric. The method also includes forming a first photoresist pattern defining a via hole on the second inter metal dielectric, forming a via hole exposing the etch stop layer using the first photo resist pattern, and forming a second photoresist pattern defining a trench by exposing and developing the first photoresist pattern. The method further includes forming a trench by etching the second inter metal dielectric using the second photoresist pattern as a mask, removing the etch stop layer exposed through the via hole, and forming a metal wiring by filling the via hole and the trench.