Apparatus and methods for interconnect simulation in electronic circuitry using non-uniform time step

In one embodiment, a system comprises a computer. The computer is configured to generate a plurality of partial sums corresponding to a first time point of a response on an interconnect, and generate the response at the first time point as a sum of the partial sums. The plurality of partial sums are...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: CROIX JOHN F
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!