Apparatus and methods for interconnect simulation in electronic circuitry using non-uniform time step

In one embodiment, a system comprises a computer. The computer is configured to generate a plurality of partial sums corresponding to a first time point of a response on an interconnect, and generate the response at the first time point as a sum of the partial sums. The plurality of partial sums are a function of at least: one or more poles and residues of the interconnect and a time step; wherein at least a first partial sum of the plurality of partial sums is also a function of the first partial sum calculated for a second time point that precedes the first time point.