Semiconductor device

On an Si substrate 1 , a buffer layer 2 , a SiGe layer 3 , and an Si cap layer 4 are formed. A mask is formed on the substrate, and then the substrate is patterned. In this manner, a trench 7 a is formed so as to reach the Si substrate 1 and have the side faces of the SiGe layer 3 exposed. Then, the...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: SORADA HARUYUKI, OHNISHI TERUHITO, SUGAHARA GAKU, HARA YOSHIHIRO, ASAI AKIRA
Format: Patent
Sprache:eng
Schlagworte:
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Beschreibung
Zusammenfassung:On an Si substrate 1 , a buffer layer 2 , a SiGe layer 3 , and an Si cap layer 4 are formed. A mask is formed on the substrate, and then the substrate is patterned. In this manner, a trench 7 a is formed so as to reach the Si substrate 1 and have the side faces of the SiGe layer 3 exposed. Then, the surface of the trench 7 a is subjected to heat treatment for one hour at 750° C. so that Ge contained in a surface portion of the SiGe layer 3 is evaporated. Thus, a Ge evaporated portion 8 having a lower Ge content than that of other part of the SiGe layer 3 is formed in part of the SiGe layer 3 exposed at part of the trench 7 a. Thereafter, the walls of the trench 7 a are oxidized.