Reduced dry etching lag

A method of forming via structures between a first electrically conductive layer and a second electrically conductive layer. The first electrically conductive layer is formed, and a dielectric layer is formed over the first electrically conductive layer. A first photoresist layer is formed over the dielectric layer, and patterned with a first via hole pattern. The first via hole pattern includes via holes that are all disposed within a first distance one from another, called dense via holes, and excludes via holes that are disposed at greater than the first distance one from another, called isolated via holes. The dense via holes are etched into the dielectric layer at first etch conditions until the dense via holes are properly formed, and the first photoresist layer is removed. A second photoresist layer is formed over the dielectric layer, and is patterned with a second via hole pattern. The second via hole pattern excludes dense via holes and includes isolated via holes. The isolated via holes are etched into the dielectric layer at second etch conditions until the isolated via holes are properly formed, and the second photoresist layer is removed. Electrically conductive vias are formed within both the dense via holes and the isolated via holes, and the second electrically conductive layer is formed over the dielectric layer. Electrical continuity exists between the first electrically conductive layer and the second electrically conductive layer through the electrically conductive vias.