Instruction execution control for very long instruction words computing architecture based on the free state of the computing function units

Controlling an order of instructions executed by a VLIW computing architecture comprised of a plurality of computing functional units. A first VLIW instruction sequence is generated based on jobs selected from a job queue, each instruction field of the VLIWs corresponding to one of the computing functional units and containing a sequential instruction. The first VLIW sequence is sequentially executed by the computing architecture, and a detection is made if any of the computing functional units is in a free state. When at least one free computing functional units is detected, a second sequence of long instruction words is generated including instructions from a selected new job from the job queue for each such free computing functional unit. The second sequence of long instruction words is copied into the first sequence of long instruction words, and execution of the first sequence of long instruction words is resumed if it was halted.