Clock signal distribution utilizing differential sinusoidal signal pair

A differential sinusoidal signal pair is generated on an integrated circuit (IC). The differential sinusoidal signal pair is distributed to clock receiver circuits, which may be differential amplifiers. The clock receiver circuits receive the differential sinusoidal signal pair and convert the diffe...

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Bibliographische Detailangaben
Hauptverfasser:	VENTRONE SEBASTIAN THEODORE, DEAN ALVAR ANTONIO, BONACCIO ANTHONY RICHARD, FARRAHI AMIR H, HATHAWAY DAVID J, COHN JOHN MAXWELL
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRONIC CIRCUITRY CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY PHYSICS PULSE TECHNIQUE
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Beschreibung
Zusammenfassung:	A differential sinusoidal signal pair is generated on an integrated circuit (IC). The differential sinusoidal signal pair is distributed to clock receiver circuits, which may be differential amplifiers. The clock receiver circuits receive the differential sinusoidal signal pair and convert the differential sinusoidal pair to local clock signals. Power consumption and noise generation are reduced as compared to conventional clock signal distribution arrangements.