Clock multiplexing system

Clock multiplexing system

A clock control circuit in an integrated circuit for providing a differential clock signal to a differential clock tree. The clock control circuit includes: first differential multiplexers configured to select first outputs from the input clock signals; second differential multiplexers coupled to th...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: YOUNG STEVEN P, VADI VASISHT MANTRA
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRONIC CIRCUITRY
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTRICITY
PHYSICS
PULSE TECHNIQUE
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Beschreibung
Zusammenfassung:A clock control circuit in an integrated circuit for providing a differential clock signal to a differential clock tree. The clock control circuit includes: first differential multiplexers configured to select first outputs from the input clock signals; second differential multiplexers coupled to the first differential multiplexers and configured to select second outputs from the first outputs; loop back signal lines configured to feed back the second outputs to at least part of the input clock signals of the first differential multiplexers; and differential signal lines of the differential clock tree coupled to the second outputs.