Method and apparatus for integrated circuit design with library cells

Methods are apparatuses are disclosed for library cells for designing an integrated circuit. Various embodiments cover one or more of virtual buses; virtual tap cells; placement primarily for electrical coupling to a well or substrate; placement at a granularity level of electrical coupling to a wel...

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Hauptverfasser: ZAMPAGLIONE MICHAEL A, MCMANUS MICHAEL J, RIVERA BILLIE J, TALBURT RICHARD, WALKER WILLIAM G
Format: Patent
Sprache:eng
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Zusammenfassung:Methods are apparatuses are disclosed for library cells for designing an integrated circuit. Various embodiments cover one or more of virtual buses; virtual tap cells; placement primarily for electrical coupling to a well or substrate; placement at a granularity level of electrical coupling to a well or substrate; metal substantially octagonal via structures; free placement according to a minimum drawing resolution of significant features, cell boundary vertices, and routing wires; and cells permitting overlap.