System for dynamic re-allocation of test pattern data for parallel and serial test data patterns

A single memory automated test equipment (ATE) system having multiple pin segments with dynamic pin reallocation. Each pin segment having a length 2n is coupled to the single memory by a parallel in/parallel out shift register that also has a length 2n. The single memory is used to store both parallel data vectors and serial data vectors. Each output of the shift register is coupled to one pin of the corresponding pin segment. Selected, e.g., every other output of the shift register is also coupled to a data selection circuit associated with each pin of the pin segment. The contents of the shift register may be divided into a number of equal length serial data streams. The data selection circuit provides for coupling any serial data stream from the shift register to any pin within the pin segment, and for coupling a single serial data stream to more than one pin.