Method and apparatus for testing multi-port memories

A method and system for testing multiported memories, especially when one or more of the ports are not directly accessible without intervening logic. The method and system segregates the multiported memory into at least two portions which are then used for testing the one or more ports which are not...

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Bibliographische Detailangaben
Hauptverfasser: ZARRINEH KAMRAN, GREGOR STEVEN L, ECKENRODE THOMAS J, ADAMS R. DEAN
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A method and system for testing multiported memories, especially when one or more of the ports are not directly accessible without intervening logic. The method and system segregates the multiported memory into at least two portions which are then used for testing the one or more ports which are not directly accessible.