Voltage detection circuit

A voltage detection circuit. A second NMOS transistor has a gate coupled to the gate of a first NMOS transistor. A comparator has input terminals, and an output terminal. A first resistor is coupled between the first input terminal and the source of the first NMOS transistor, a second resistor is co...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser:	YEN WENNG, LEE CHAOI
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRONIC CIRCUITRY CODE CONVERSION IN GENERAL CODING DECODING ELECTRICITY MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS PULSE TECHNIQUE TESTING
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Beschreibung
Zusammenfassung:	A voltage detection circuit. A second NMOS transistor has a gate coupled to the gate of a first NMOS transistor. A comparator has input terminals, and an output terminal. A first resistor is coupled between the first input terminal and the source of the first NMOS transistor, a second resistor is coupled to the comparator and the first resistor, a third resistor is coupled between the second resistor and the comparator, and a fourth resistor is coupled between the second and third resistors, and ground. A first PMOS transistor has a gate coupled to the gates of the first and second NMOS transistors. A second PMOS transistor has a connected gate and drain, a source coupled to the gates of first and second NMOS transistors, a drain coupled to ground, and an n-well directly connected to the gates of the first and second NMOS transistors.