Structure and method for eliminating time dependent dielectric breakdown failure of low-k material

An interconnect structure for a semiconductor device includes a metallization line formed within a low-k dielectric material, the metallization line being surrounded on bottom and side surfaces thereof by a liner material. An embedded dielectric cap is formed over a top surface of the metallization...

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Hauptverfasser: AGARWALA BIRENDRA N, NGUYEN DU B, RATHORE HAZARA S
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:An interconnect structure for a semiconductor device includes a metallization line formed within a low-k dielectric material, the metallization line being surrounded on bottom and side surfaces thereof by a liner material. An embedded dielectric cap is formed over a top surface of the metallization line, wherein the embedded dielectric cap has a sufficient thickness so as to separate a top surface of the liner material from a hardmask layer formed over the low-k dielectric material.