Sputtered silicon for microstructures and microcavities

A sputtered silicon layer and a low temperature fabrication method thereof, is introduced. The sputtered silicon layer is sputtered with predetermined sputtering criteria resulting in a predetermined pre-annealing configuration. The sputtering criteria include sputtering power, ambient sputtering pressure, choice of sacrificial layer and etchant. The initially sputtered layer is transformed during a low temperature annealing process into a post-annealing state. A released structure is micro-machined from the sputtered layer in its post-annealed state. The low temperature annealing leaves pre-fabricated integrated aluminum-metalized circuitry unaffected. Optional conductive sputtered co-layers reduce resistivity and may be used to further tune strain and strain gradient.