Method of forming semiconductor device including silicon oxide with fluorine, embedded wiring layer, via holes, and wiring grooves

An interlayer dielectric film that surrounds via holes for connecting wirings of a second wiring layer and the wirings of third wiring layer is constituted of a dielectric material having a relatively smaller Young's modulus compared with the Young's modulus of a dielectric material consti...

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Bibliographische Detailangaben
Hauptverfasser:	MIYAZAKI HIROSHI, OSHIMA TAKAYUKI, AOKI HIDEO, OHMORI KAZUTOSHI
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS CHEMICAL SURFACE TREATMENT CHEMISTRY COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY IONIMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL COATING MATERIAL WITH METALLIC MATERIAL COATING METALLIC MATERIAL DIFFUSION TREATMENT OF METALLIC MATERIAL ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL METALLURGY SEMICONDUCTOR DEVICES SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THESURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION
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Beschreibung
Zusammenfassung:	An interlayer dielectric film that surrounds via holes for connecting wirings of a second wiring layer and the wirings of third wiring layer is constituted of a dielectric material having a relatively smaller Young's modulus compared with the Young's modulus of a dielectric material constituting a dielectric film that surrounds wiring grooves in dual damascene wirings, which can improve the heat resistance and electromigration resistance of the dual damascene wirings.