Method for gross input leakage functional test at wafer sort
A method and test configuration for performing a gross input leakage test at wafer sort is described. The method uses a pullup and pulldown on an I/O pad to inject current at the I/O pad, and, based on the resulting voltage, determines if the leakage current is excessive. The method allows an input...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | A method and test configuration for performing a gross input leakage test at wafer sort is described. The method uses a pullup and pulldown on an I/O pad to inject current at the I/O pad, and, based on the resulting voltage, determines if the leakage current is excessive. The method allows an input leakage test to be performed at wafer sort without a precision measurement unit and without direct access to the I/O pad to be tested. |
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