TDM bus synchronization circuit and protocol and method of operation

There is disclosed a data transfer system that uses a TDM serial multiple format and supporting method that is capable of multiplexing and de-multiplexing a number of asynchronous and arbitrarily framed component serial data streams. The data transfer system comprises: 1) a frame data interface circuit capable of receiving incoming data streams from a plurality of asynchronous frame data sources and indicating their frame boundaries with the bit streams; and 2) a transmit buffer and data segmenter coupled to the frame data interface circuit and receiving the incoming data frames therefrom. The transmit buffer/segmenter divides incoming data frames into N-bit data fields and attaches to each N-bit data field an M-bit control field identifying the frame bit boundary and capable of conveying additional control or synchronization information associated with the incoming data frames. Each N-bit data field and the attached M-bit control field comprise a data record to be transmitted. The data records are assembled into a TDM transport formatted datagram consisting of, for example, 28 time slots, each of which is capable of carrying a single data record from a selected serial buffer/segmenter. The data transfer system further comprises a receive buffer coupled to the transmit buffer. The receive buffer reassembles the incoming data frames from the received data records and generates from the synchronization indicia a timing signal associated with the incoming data frames. A receive clock generator uses the receive buffer timing signal to regenerate the individual clock signal associated with each asynchronous serial stream component.