Semiconductor test apparatus

The invention provides a structure that does not employ complicated and large-scale control circuits or control memory, minimizes the circuits for real time processing, and allows the use of refresh memory. The invention provides a test clock (8-1) comprising a data processing apparatus (1-1) provid...

Ausführliche Beschreibung

Bibliographische Detailangaben

1. Verfasser:	TAKEUCHI NOBUAKI
Format:	Patent
Sprache:	eng
Schlagworte:	INFORMATION STORAGE MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS STATIC STORES TESTING
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