Application specific integrated circuit design tool and file structure

A design tool and method for characterizing a circuit at a hardware level includes the steps of generating a behavioral level description of the circuit and generating a netlist from the behavioral level description. Reference equations are generated from the netlist and are translated into numeric and symbolic C-code. The symbolic C-code is compared to the numeric C-code for validation. The reference equations are translated into numeric and symbolic HDL-code. The symbolic HDL-code is compared to the numeric HDL-code for validation. The symbolic C-code is compiled and simulated. A C-code equation file is generated. The symbolic HDL-code is compiled and simulated. A HDL-code equation file is generated. A symbolic manipulation program is used to solve for a difference between the C-code equation file and the HDL-code equation file. If there are no unexpected differences, equivalence is established.