Memory with vectorial access
A parallel memory configured to enable access to a table with aligned and equidistant components constituting a vector of N components. The memory (1) is organized as M memory banks (8). Each memory bank (8) includes an address calculator. The memory (1) also includes a unidirectional network (6) co...
Gespeichert in:
Hauptverfasser: | , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | A parallel memory configured to enable access to a table with aligned and equidistant components constituting a vector of N components. The memory (1) is organized as M memory banks (8). Each memory bank (8) includes an address calculator. The memory (1) also includes a unidirectional network (6) configured to carry out a permutation of the N components of the vector being accessed and to carry out a translation by a specified value t of the components of the vector. |
---|