Display device

An object is to eliminate the effect of jitter in a sampling clock to realize proper sampling of a video signal. An A/D converter (1) samples a video signal in synchronization with a sampling clock (VCLK) at a rate of a period which is ½ times the video period. The phase of the sampling clock (VCLK)...

Ausführliche Beschreibung

Gespeichert in:

Bibliographische Detailangaben
Hauptverfasser:	MURAKAMI YASUO, HARA KOUICHIROU
Format:	Patent
Sprache:	eng
Schlagworte:	ADVERTISING ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES BASIC ELECTRONIC CIRCUITRY CRYPTOGRAPHY DISPLAY EDUCATION ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY PHYSICS PICTORIAL COMMUNICATION, e.g. TELEVISION SEALS
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!

container_end_page
container_issue
container_start_page
container_title
container_volume
creator	MURAKAMI YASUO HARA KOUICHIROU
description	An object is to eliminate the effect of jitter in a sampling clock to realize proper sampling of a video signal. An A/D converter (1) samples a video signal in synchronization with a sampling clock (VCLK) at a rate of a period which is ½ times the video period. The phase of the sampling clock (VCLK) is corrected in a phase correcting circuit (9). The sampled signals are held alternately as data (DL) and (DR) in two latches (14) (15). A data switching portion (16) selects output signals from one of the two latches (14) and (15). A calculating portion (21) calculates an absolute difference value (DeltaD) between the data (DL) and (DR) in each video period. A calculating portion (22) calculates a maximum value (Dmax) among the absolute difference values (DeltaD) in one frame. A phrase control portion (19) controls the phase correcting circuit (9) and the data switching portion (16) so that a video signal processing circuit (2) can receive sampled signals which are sampled signals which are sampled at a phase corresponding to the center of a rising transition which the maximum value (Dmax) makes as the phase varies.
format	Patent
fullrecord	<record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US6686969B1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US6686969B1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US6686969B13</originalsourceid><addsrcrecordid>eNrjZOBzySwuyEmsVEhJLctMTuVhYE1LzClO5YXS3AwKbq4hzh66qQX58anFBYnJqXmpJfGhwWZmFmaWZpZOhsZEKAEAIFceTw</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Display device</title><source>esp@cenet</source><creator>MURAKAMI YASUO ; HARA KOUICHIROU</creator><creatorcontrib>MURAKAMI YASUO ; HARA KOUICHIROU</creatorcontrib><description>An object is to eliminate the effect of jitter in a sampling clock to realize proper sampling of a video signal. An A/D converter (1) samples a video signal in synchronization with a sampling clock (VCLK) at a rate of a period which is ½ times the video period. The phase of the sampling clock (VCLK) is corrected in a phase correcting circuit (9). The sampled signals are held alternately as data (DL) and (DR) in two latches (14) (15). A data switching portion (16) selects output signals from one of the two latches (14) and (15). A calculating portion (21) calculates an absolute difference value (DeltaD) between the data (DL) and (DR) in each video period. A calculating portion (22) calculates a maximum value (Dmax) among the absolute difference values (DeltaD) in one frame. A phrase control portion (19) controls the phase correcting circuit (9) and the data switching portion (16) so that a video signal processing circuit (2) can receive sampled signals which are sampled signals which are sampled at a phase corresponding to the center of a rising transition which the maximum value (Dmax) makes as the phase varies.</description><edition>7</edition><language>eng</language><subject>ADVERTISING ; ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION ; AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES ; BASIC ELECTRONIC CIRCUITRY ; CRYPTOGRAPHY ; DISPLAY ; EDUCATION ; ELECTRIC COMMUNICATION TECHNIQUE ; ELECTRICITY ; PHYSICS ; PICTORIAL COMMUNICATION, e.g. TELEVISION ; SEALS</subject><creationdate>2004</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20040203&DB=EPODOC&CC=US&NR=6686969B1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20040203&DB=EPODOC&CC=US&NR=6686969B1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>MURAKAMI YASUO</creatorcontrib><creatorcontrib>HARA KOUICHIROU</creatorcontrib><title>Display device</title><description>An object is to eliminate the effect of jitter in a sampling clock to realize proper sampling of a video signal. An A/D converter (1) samples a video signal in synchronization with a sampling clock (VCLK) at a rate of a period which is ½ times the video period. The phase of the sampling clock (VCLK) is corrected in a phase correcting circuit (9). The sampled signals are held alternately as data (DL) and (DR) in two latches (14) (15). A data switching portion (16) selects output signals from one of the two latches (14) and (15). A calculating portion (21) calculates an absolute difference value (DeltaD) between the data (DL) and (DR) in each video period. A calculating portion (22) calculates a maximum value (Dmax) among the absolute difference values (DeltaD) in one frame. A phrase control portion (19) controls the phase correcting circuit (9) and the data switching portion (16) so that a video signal processing circuit (2) can receive sampled signals which are sampled signals which are sampled at a phase corresponding to the center of a rising transition which the maximum value (Dmax) makes as the phase varies.</description><subject>ADVERTISING</subject><subject>ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION</subject><subject>AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES</subject><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>CRYPTOGRAPHY</subject><subject>DISPLAY</subject><subject>EDUCATION</subject><subject>ELECTRIC COMMUNICATION TECHNIQUE</subject><subject>ELECTRICITY</subject><subject>PHYSICS</subject><subject>PICTORIAL COMMUNICATION, e.g. TELEVISION</subject><subject>SEALS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2004</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZOBzySwuyEmsVEhJLctMTuVhYE1LzClO5YXS3AwKbq4hzh66qQX58anFBYnJqXmpJfGhwWZmFmaWZpZOhsZEKAEAIFceTw</recordid><startdate>20040203</startdate><enddate>20040203</enddate><creator>MURAKAMI YASUO</creator><creator>HARA KOUICHIROU</creator><scope>EVB</scope></search><sort><creationdate>20040203</creationdate><title>Display device</title><author>MURAKAMI YASUO ; HARA KOUICHIROU</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US6686969B13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2004</creationdate><topic>ADVERTISING</topic><topic>ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION</topic><topic>AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES</topic><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>CRYPTOGRAPHY</topic><topic>DISPLAY</topic><topic>EDUCATION</topic><topic>ELECTRIC COMMUNICATION TECHNIQUE</topic><topic>ELECTRICITY</topic><topic>PHYSICS</topic><topic>PICTORIAL COMMUNICATION, e.g. TELEVISION</topic><topic>SEALS</topic><toplevel>online_resources</toplevel><creatorcontrib>MURAKAMI YASUO</creatorcontrib><creatorcontrib>HARA KOUICHIROU</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>MURAKAMI YASUO</au><au>HARA KOUICHIROU</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Display device</title><date>2004-02-03</date><risdate>2004</risdate><abstract>An object is to eliminate the effect of jitter in a sampling clock to realize proper sampling of a video signal. An A/D converter (1) samples a video signal in synchronization with a sampling clock (VCLK) at a rate of a period which is ½ times the video period. The phase of the sampling clock (VCLK) is corrected in a phase correcting circuit (9). The sampled signals are held alternately as data (DL) and (DR) in two latches (14) (15). A data switching portion (16) selects output signals from one of the two latches (14) and (15). A calculating portion (21) calculates an absolute difference value (DeltaD) between the data (DL) and (DR) in each video period. A calculating portion (22) calculates a maximum value (Dmax) among the absolute difference values (DeltaD) in one frame. A phrase control portion (19) controls the phase correcting circuit (9) and the data switching portion (16) so that a video signal processing circuit (2) can receive sampled signals which are sampled signals which are sampled at a phase corresponding to the center of a rising transition which the maximum value (Dmax) makes as the phase varies.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record>
fulltext	fulltext_linktorsrc
identifier
ispartof
issn
language	eng
recordid	cdi_epo_espacenet_US6686969B1
source	esp@cenet
subjects	ADVERTISING ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES BASIC ELECTRONIC CIRCUITRY CRYPTOGRAPHY DISPLAY EDUCATION ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY PHYSICS PICTORIAL COMMUNICATION, e.g. TELEVISION SEALS
title	Display device
url	https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-08T18%3A26%3A25IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=MURAKAMI%20YASUO&rft.date=2004-02-03&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS6686969B1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true