Host bus adapter based scalable performance storage architecture

One embodiment of a storage controller is described including a controller memory, one or more central processing units (CPUs), and a host bus adapter all coupled to a controller bus. The one or more CPUs are configured to produce data routing information dependent upon a data transfer command which...

Ausführliche Beschreibung

Bibliographische Detailangaben

1. Verfasser:	CHONG, JR. FAY
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC COMMUNICATION TECHNIQUE ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY PHYSICS TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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