Write precompensation circuit and read channel with write precompensation circuit that generates output signals by interpolating between selected phases

Write precompensation circuit and read channel with write precompensation circuit that generates output signals by interpolating between selected phases

An improved write precompensation circuit. Eight phases from a PLL phase oscillator are received as inputs into a bank of four phase blenders (104). The phase blenders (104) output a 0%, 25%, 50%, or 75% interpolation to the adjacent phases. A multiplexer (110) is then used to select which of the ph...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: TOOSKY ZABIH, HUEWELS ULRICH, CYRUSIAN SASAN
Format: Patent
Sprache:eng
Schlagworte:
INFORMATION STORAGE
INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORDCARRIER AND TRANSDUCER
PHYSICS
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Beschreibung
Zusammenfassung:An improved write precompensation circuit. Eight phases from a PLL phase oscillator are received as inputs into a bank of four phase blenders (104). The phase blenders (104) output a 0%, 25%, 50%, or 75% interpolation to the adjacent phases. A multiplexer (110) is then used to select which of the phase outputs is used for the write precompensation.