Apparatus and system for blocking memory access during DMA transfer

Apparatus and system for blocking memory access during DMA transfer

The present invention is directed to an apparatus and system for selectively inhibiting access to a memory during a DMA block transfer. In accordance with one embodiment of the present invention, the system includes memory, a DMA engine, and logic configured so that when a control signal is asserted...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: ALLOIN LAURENT, AIZENBERG YAIR, LIM YONG JE, KLEEWEIN PETER
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:The present invention is directed to an apparatus and system for selectively inhibiting access to a memory during a DMA block transfer. In accordance with one embodiment of the present invention, the system includes memory, a DMA engine, and logic configured so that when a control signal is asserted, the logic blocks the DMA engine's request for access to memory and generates an acknowledgment of the request, such that the DMA engine performs a DMA transfer without accessing data in memory.