SRAM bit line architecture

To alleviate the crosstalk between BL and BLN of the same column, the present invention provides vertical twisting for the bit line and the complementary bit line of a line pair connecting a column of memory bits to a sense amplifier. The BL and BLN run in the same direction, but never within same metal layer and never overlying each other. To provide vertical twisting, horizontal and vertical switching are done in the same crossover channels so that BL and BLN have the same length in order to keep the overall capacitance of each line the same. Triple standard twist regions can be used for both the horizontal and vertical twists. The capacitance between BL and BLN are substantially reduced as well as the capacitance to neighboring column BLs and BLNs. Capacitive coupling between a BL and a BLN of the same column is reduced to thereby prevent reduction of the voltage difference, or delta voltage, presented to the differential input terminals of a senseamp.